The present invention relates to a counter/timer device, and more particularly to a programmable counter/timer device in which a counter/timer register and a capture/compare register both used for a timing operation can be freely selected from a register group made up of a plurality of registers.
In a conventional counter/timer LSI which is fabricated for and connected to a microcomputer, a single capture register and a single compare register are usually provided for each of a plurality of counter/timer registers, and it is impossible to change the functions of these registers. Further, an input terminal for applying a control signal from the outside to a counter/timer and an output terminal for delivering an output from the counter/timer to the outside are connected only to the counter/timer, and it is impossible to connect the input and output terminals to another counter/timer. Furthermore, a control register, through which a central processing unit sets the function of counter/timer register, is provided for each counter/timer register. For example, in the MC 6840 which is manufactured by Motorola Inc. and is a typical counter/timer LSI, three counter/timer registers are provided, and one capture register, one control register, two input terminals and one output terminal are provided for each of the counter/timer registers. In the MC 6840, however, the contents of each counter/timer register is always compared with zero, and hence a compare register is absent in the strict sense. Further, the arrangement of these registers and input/output terminals is fixed.
A counter/timer incorporated in a single-chip microcomputer is discussed in, for example, an article entitled "Motorola's MC68HC11: Definition and Design of a VLSI Microcomputer" by J.M. Sibigtroth (IEEE MICRO, February, 1984). The single-chip microcomputer discussed in the above article has an excellent function. In this microcomputer, however, the number of counter/timer registers, the number of capture registers each for holding the number of input pulses, and the number of compare registers each for determining a time interval between pulse outputs are all fixed. Moreover, the functions of these registers as well as the combination of counter/timer registers and capture/compare registers are fixed. Accordingly, in a case where the single-chip microcomputer is applied to the control of various apparatuses, the counter/timer part of the microcomputer will be deficient in the selection of registers. Further, as to the arrangement of I/O pins, only the output terminal of a specified counter/timer register can be selected from a plurality of terminals, but other terminals are fixed. Specifically, in a single-chip microcomputer, the number of I/O terminals is limited, and hence it is desirable to be able to freely change the connection between counter/timer registers and I/O terminals.